Modern computers and other electrical devices use integrated circuits composed of transistors, other components, and interconnections. In the past, one of the principal limitations on the computational speed of computers, and the operational speed of other devices, was the rate at which their component transistors could switch between logic states. As the switching speed of transistors has improved, the overall speed of computers and other devices has become limited by other factors.
One of these limiting factors is the speed with which signals are transmitted between the individual transistors which comprise an integrated circuit. During transmission of signals along parallel lines between transistors and other elements, the signal strength, propagation time, and propagation environment are affected by a variety of physical mechanisms. The present invention reduces or eliminates the effects of certain of these mechanisms, thereby improving the speed and other operating characteristics of devices in which signals are transmitted along parallel lines.
The strength of a signal transmitted along a line degrades due to resistance losses along the propagation path. In addition, the signal propagation time between two elements connected by a line depends on the resistance and capacitance of the line (the delay depends on the resistance-capacitance product, or "RC" product, of the interconnect line).
A further problem is that a signal propagating along a first line induces electromagnetic fields in adjacent parallel lines due to electromagnetic coupling. This "crosstalk" between the lines increases the noise and reduces the signal-to-noise ratio of the signal transmitted through the first line. Crosstalk interferes with the intended signal transmission and degrades the operational characteristics of the device.
Another problem that may affect the marketability of a product is that certification from the Federal Communications Commission (FCC), which is often a prerequisite for sale of a product, is dependent on the level of ambient electromagnetic radiation produced by its wires and components. Therefore it is important in designing a device to reduce the level of emissions generated by the device. Since wires carrying a time varying current produce electromagnetic radiation, the structure of transistor interconnection lines can affect the level of emissions, and hence the likelihood that a device will receive FCC certification.
Another problem with transmission of voltage signals between voltage inverters along parallel lines is that even mode propagation of the signals (which occurs when the signals propagating along corresponding segments of the lines undergo simultaneous transitions from higher to lower or lower to higher voltage states), results in faster propagation than odd mode propagation of the signals (which occurs when each transition of a bilevel signal in one line from a first voltage state to second voltage state occurs at the same time that the signal propagating along a corresponding segment of a parallel line undergoes a transition from the second state to the first state). This asymmetry in propagation time (between odd and even mode propagation) can affect the operation of a device which relies on synchronous switching of components between states, because the triggering signals for the switching may not propagate along two interconnect lines in the same amount of time, depending on the operating mode of the device. This affects the development and utility of integrated circuits since it means that the possibility of both even and odd mode propagation must be taken into account when the circuit is designed.
The problems noted above affect the operational performance of computers and other electrical devices, and can determine whether the device's characteristics make it desirable to the user. Several conventional approaches have been used in attempts to overcome some of the problems (but not all of them at one time), to transmit signals efficiently between separated circuit elements of a printed circuit board or integrated circuit.
One conventional method is to use a driver circuit which overcomes the inherent losses along a line by amplifying the signal before it is sent through a line (for example, a line connecting two transistors). This addresses signal degradation problems, but does not resolve the other abovementioned problems. Indeed, use of a driver can increase (rather than decrease) electromagnetic emissions, and does not address the problem of propagation time dependence on even or odd propagation mode.
Because both the resistance (R) and capacitance (C) of an interconnect line increases linearly with line length, the propagation delay (proportional to the product RC) is proportional to the square of the line length. Another conventional method exploits this phenomenon by breaking an interconnect line into multiple (shorter) line sections, and connecting a repeater circuit (such as an inverter) between each pair of adjacent line sections, so that a voltage signal will propagate from repeater to repeater down the line.
Connection of repeaters in this manner breaks the line into smaller sections whose delay times add together arithmetically to give the total line delay. This results in a total delay time for the line which is proportional to its length instead of the square of its length. Use of repeaters is described in Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison-Wesley Publishing Co., 1990, which also discusses alternative conventional approaches to reducing distributed RC delays along interconnect lines.
However, even if repeaters are employed to break a line into segments, some of the above-described problems remain. While signal degradation is lessened, propagation delay is improved, and crosstalk is reduced under certain conditions, conventional use of repeaters does not significantly reduce electromagnetic emissions or address the propagation time asymmetry problem, and crosstalk can still be a problem. In addition, conventional use of repeaters can affect the ultimate size of a device since they increase the amount of packing room necessary for each interconnect line.
Another conventional method that has been used to address the RC delay problem is to reduce interconnection resistance by using aluminum lines in conjunction with a hierarchy of interconnect levels on an integrated circuit. Aluminum is a desirable material for forming interconnect lines because of its low resistance. The shorter, local interconnections on the same level of the circuit can be of one cross-sectional shape of aluminum, and those between different levels of the circuit can utilize aluminum whose cross-section has been optimized (by making it wider and thicker) to reduce the RC product for the lines. This approach solves some of the above-mentioned problems, at least on a global level, but increases the complexity of the design task and fails to address some of the problems.
The present invention significantly reduces or eliminates all of the above-mentioned problems, enabling signals to be transmitted along pairs of generally parallel lines (e.g., between transistors) faster and more efficiently, with minimal effect on the packing requirements for devices which embody the invention. This results in enhanced performance for devices which incorporate multiple, connected transistors. It is an object of the present invention to provide a means for solving the problems inherent in the use of long interconnect lines without the drawbacks and limitations of conventional use of drivers or repeaters.